Commit Graph

8 Commits (ea1cdf0fb28f31ab36ea95d8d65abfcc184d1b8f)

Author SHA1 Message Date
Mulugeta Mammo 3beb07b198 Add a new architecture mode: 'avx512_spr'. (#4025)
Summary:
This PR adds a new architecture mode to support the new extensions to AVX512, namely [AVX512-FP16](https://networkbuilders.intel.com/solutionslibrary/intel-avx-512-fp16-instruction-set-for-intel-xeon-processor-based-products-technology-guide), which have been available since Intel® Sapphire Rapids.

This PR is a prerequisite for [PR#4020](https://github.com/facebookresearch/faiss/pull/4020) that speeds up hamming distance evaluations.

Pull Request resolved: https://github.com/facebookresearch/faiss/pull/4025

Reviewed By: pankajsingh88

Differential Revision: D67524575

Pulled By: mengdilin

fbshipit-source-id: f3a09943b062d720b241f95aef2f390923ffd779
2024-12-23 08:56:26 -08:00
vorj 4eeaa42b93 Add sve targets (#2886)
Summary:
related: https://github.com/facebookresearch/faiss/issues/2884

This PR contains below changes:

- Add new optlevel `sve`
    - ARM SVE is _extension_ of ARMv8, so it should be treated similar to AVX2 IMO
- Add targets for ARM SVE, `faiss_sve` and `swigfaiss_sve`
    - These targets will be built when you give `-DFAISS_OPT_LEVEL=sve` at build time
    - Design decision: Don't fix SVE register length.
        - The python package of faiss is "fat binary" (for example, the package for avx2 contains `_swigfaiss_avx2.so` and `_swigfaiss.so`)
        - SVE is scalable instruction set (= doesn't fix vector length), but actually we can specify the vector length at compile time.
            - [with `-msve-vector-length=` option](https://developer.arm.com/documentation/101726/4-0/Coding-for-Scalable-Vector-Extension--SVE-/SVE-Vector-Length-Specific--VLS--programming)
            - When this option is specified, the binary can't work correctly on the CPU which has other vector length rather than specified at compile time
        - When we use fixed vector length, SVE-supported faiss python package will contain 7 shared libraries like `_swigfaiss.so` , `_swigfaiss_sve.so` , `_swigfaiss_sve128.so` , `_swigfaiss_sve256.so` , `_swigfaiss_sve512.so` , `_swigfaiss_sve1024.so` , and `_swigfaiss_sve2048.so` . The package size will be exploded.
        - For these reason, I don't specify the vector length at compile time and `faiss_sve` detects the vector length at run time.
- Add a mechanism of detecting ARM SVE on runtime environment and importing `swigfaiss_sve` dynamically
    - Currently it only supports Linux, but there is no SVE environment with non-Linux OS now, as far as I know

NOTE: I plan to make one more PR about add some SVE implementation after this PR merged. This PR only contains adding sve target.

Pull Request resolved: https://github.com/facebookresearch/faiss/pull/2886

Reviewed By: ramilbakhshyiev

Differential Revision: D60386983

Pulled By: mengdilin

fbshipit-source-id: 7e66162ee53ce88fbfb6636e7bf705b44e6c3282
2024-07-29 15:05:17 -07:00
Abhiram Vadlapatla ec67ac1594 Update .gitignore (#3492)
Summary:
Adding build folder to gitignore, so that they don't show up in the commit tree while building from source

Pull Request resolved: https://github.com/facebookresearch/faiss/pull/3492

Reviewed By: junjieqi

Differential Revision: D58171359

Pulled By: asadoughi

fbshipit-source-id: b0efed348769328a3bdbcc13098dcb84cadb6c4f
2024-06-04 21:59:57 -07:00
Gergely Szilvasy 0013c702f4 avx512 CI + conda packages (#3197)
Summary: Pull Request resolved: https://github.com/facebookresearch/faiss/pull/3197

Reviewed By: mlomeli1

Differential Revision: D52689379

Pulled By: algoriddle

fbshipit-source-id: 54e27c6d310d6da14777ae10ae62f46e7076cacf
2024-01-11 08:26:33 -08:00
Check Deng 41007232d6 AQ fastscan (#2169)
Summary:
Work in progress.

Pull Request resolved: https://github.com/facebookresearch/faiss/pull/2169

Test Plan:
buck test mode/opt //faiss/tests/:test_fast_scan
buck test mode/opt //faiss/tests/:test_fast_scan_ivf

Reviewed By: beauby

Differential Revision: D34208813

Pulled By: mdouze

fbshipit-source-id: 74b72e07dc537667a7def403c4e46d3d05408c27
2022-02-22 15:24:31 -08:00
Lucas Hosseini cf18101f6d Refactor makefiles and add configure script (#466)
* Refactors Makefiles and add configure script.

* Give MKL higher priority in configure script.

* Clean up Linux example makefile.inc.

* Cleanup makefile.inc examples.

* Fix python clean Makefile target.

* Regen swig wrappers.

* Remove useless CUDAFLAGS variable.

* Fix python linking flags.

* Separate compile and link phase in python makefile.

* Add macro to look for swig.

* Add CUDA check in configure script.

* Cleanup make depend targets.

* Cleanup CUDA flags.

* Fix linking flags.

* Fix python GPU linking.

* Remove useless flags from python gpu module linking.

* Add check for cuda libs.

* Cleanup GPU targets.

* Clean up test target.

* Add cpu/gpu targets to python makefile.

* Clean up tutorial Makefile.

* Remove stale OS var from example makefiles.

* Clean up cuda example flags.
2018-06-02 08:35:30 +02:00
Eduardo Pinho de0541c365 Add C API (#317)
* Add C API

* Add installation instructions for the C API
2018-02-26 11:23:17 +01:00
Matthijs Douze c670118a4e Initial commit 2017-02-22 23:26:44 +01:00